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Design Ethernet
netX 50/100/500 have two integrated Physical Layer Units (PHYs) for Ethernet Communication, that allow to build systems with two Ethernet ports, while using only a few external components like pull-ups and transformer(s).
The PHYs can be operated in two basic modes, which are twisted pair (10BASE-T / 100BASE-TX) and fiberoptic mode (100BASE-FX).
Twisted Pair
For 10BASE-T or 100BASE-TX Ethernet communication, the PHYs must be connected as shown in the following example schematic:
|
Component |
Value |
Tolerance |
Rating |
|
|
|
|
|
|
R1a, R1b, R2a, R2b, R4a, R4b, R5a, R5b |
50 Ohm |
1% |
1/8 W |
|
R3a, R3b |
10 Ohm |
1% |
1/16 W |
|
R7a, R7b, R8a, R8b, R9a, R9b, R10a, R10b |
75 Ohm |
1% |
1/16 W |
|
R11 |
12.4 kOhm |
1% |
1/16 W |
|
|
|
|
|
|
C1a, C1b, C2a, C2b |
10nF |
20% |
|
|
C3a, C3b |
10nF |
- |
2 kV |
|
C4a, C4b, C5a, C5b, C6, C8 |
100nF |
- |
6.3V |
|
C7, C9 |
10uF |
- |
6.3V |
|
|
|
|
|
|
L1, L2 |
1000 Ohm @100 MHz |
- |
200 mA |
|
|
|
|
|
|
H1, H2 |
H1102, HX1188 (Pulse Eng.), TS6121C (Bothhand) |
|
|
Fiberoptic
For 100BASE-FX Ethernet communication, the netX requires external transceivers. Since these transceivers usually work with LVPECL (Low Voltage Positive Emitter Coupled Logic) levels, appropriate signal converters must further be connected between netX and transceivers. The signal converters should be placed as close as possible to the corresponding netX pins and the traces of the differential signal lines between buffers and transceivers should provide an impedance of 50 Ohm (100 Ohm differential impedance). The signal lines are to be terminated with a Thevenin termination as shown in the following schematics.
|
Component |
Value |
Tolerance |
Rating |
|
|
|
|
|
|
R1a, R1b, R2a, R2b, R3a, R3b, R4a, R4b, R5a, R5b |
127 / 130 Ohm |
1% |
|
|
R6a, R6b, R7a, R7b, R8a, R8b, R9a, R9b, R10a, R10b |
82.5 / 82 Ohm |
1% |
|
|
R11 |
12.4 kOhm |
1% |
1/8 W |
|
R12 |
1k / 82 Ohm |
|
|
|
R13 |
1.6k / 130 Ohm |
|
|
|
|
|
|
|
|
C6, C8 |
100nF |
- |
6.3V |
|
C7, C9 |
10uF |
- |
6.3V |
|
|
|
|
|
|
L1, L2 |
1000 Ohm @100 MHz |
- |
200 mA |
Ethernet PHYs unused
If the internal Ethernet PHYs are not used in a netX design, the signal pins (RXP/RXN, TXP/TXN) should simply be left open. However, all power supply pins must still be connected, as well as the reference resistor, as shown on the following schematics:
